# Sayeef Salahuddin

### Research Areas

- Physical Electronics (PHY)
- Design, Modeling and Analysis (DMA)
- Power and Energy (ENE)
- Scientific Computing (SCI)

### Research Centers

- Center for Energy Efficient Electronics Science (E3S)

### Teaching Schedule

#### Spring 2024

- EE 130. Integrated-Circuit Devices, TuTh 15:30-16:59, Cory 540AB
- EE 230A. Integrated-Circuit Devices, TuTh 15:30-16:59, Cory 540AB

## Biography

Sayeef Salahuddin is the TSMC Distinguished professor of Electrical Engineering and Computer Sciences at the University of California Berkeley. Salahuddin received his B.Sc. in Electrical and Electronic Engineering from BUET (Bangladesh University of Engineering and Technology) in 2003 and PhD in Electrical and Computer Engineering from Purdue University in 2007. He joined the faculty of Electrical Engineering and Computer Science at University of California, Berkeley in 2008.

His work has focused on conceptualization and exploration of novel device physics for low power electronic and spintronic devices. Salahuddin has championed the concept of using 'interacting systems' for switching, showing fundamental advantage of such systems over the conventional devices in terms of power dissipation. This led to the discovery of Negative Capacitance Transistors that allows for sub kT/q subthreshold operation in transistors.

Salahuddin has received the Presidential Early Career Award for Scientist and Engineers (PECASE), the highest honor bestowed by the US Government on early career scientist and engineers. Salahuddin also received a number of other awards including the NSF CAREER award, the IEEE Nanotechnology Early Career Award, the Young Investigator Awards from the Air Force Office of Scientific Research (AFOSR) and the Army Research Office (ARO) and best paper awards from IEEE Transactions on VLSI Systems and from the VLSI-TSA conference. In 2012, Applied Physics Letters (APL) highlighted two of his papers among 50 most notable papers among all areas published in APL within 2009-2012. Salahuddin also received the George E Smith Award from the IEEE Electron Devices Society.

Salahuddin is a co-director of the Berkeley Device Modeling Center and Berkeley Center for Negative Capacitance Transistors. He served on the editorial board of IEEE Electron Devices Letters (2013-16) and was the chair the IEEE Electron Devices Society committee on Nanotechnology (2014-16).

Salahuddin is a fellow of the IEEE and the APS.

## Education

- 2007, Ph.D., Electrical and Computer Engineering, Purdue University
- 2003, B.S., Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology

## Selected Publications

- A. I. Khan, K. Chatterjee, B. Wang, S. Drapcho, L. You, C. Serrao, S. R. Bakaul, R. Ramesh, and S. Salahuddin, "Negative capacitance in a ferroelectric capacitor," Nature materials, vol. 14, no. 2, pp. 182--186, Jan. 2015.
- D. Bhowmik, L. You, and S. Salahuddin, "Spin Hall effect clocking of nanomagnetic logic without a magnetic field," Nature Nanotechnology, 2013.
- S. Salahuddin, "Solid-state physics: A new spin on spintronics," Nature, vol. 494, no. 7435, pp. 43--44, 2013.
- M. R. Esmaeili-Rad and S. Salahuddin, "High Performance Molybdenum Disulfide Amorphous Silicon Heterojunction Photodetector," Scientific Reports, vol. 3, Aug. 2013.
- Y. Yoon, K. Ganapathi, and S. Salahuddin, "How Good Can Monolayer MoS2 Transistors Be?," Nano Letters, vol. 11, no. 9, pp. 3768-3773, 2011.
- Y. Yoon, D. E. Nikonov, and S. Salahuddin, "Role of phonon scattering in graphene nanoribbon transistors: Nonequilibrium Green's function method with real space approach," Applied Physics Letters, vol. 98, no. 20, pp. 203503, 2011.
- J. T. Heron, M. Trassin, K. Ashraf, M. Gajek, Q. He, S. Y. Yang, D. E. Nikonov, Y. Chu, S. Salahuddin, and R. Ramesh, "Electric-Field-Induced Magnetization Reversal in a Ferromagnet-Multiferroic Heterostructure," Phys. Rev. Lett., vol. 107, pp. 217202, Nov. 2011.
- A. I. Khan, D. Bhowmik, P. Yu, S. J. Kim, X. Pan, R. Ramesh, and S. Salahuddin, "Experimental evidence of ferroelectric negative capacitance in nanoscale heterostructures (Cover Story)," Applied Physics Letters, vol. 99, no. 11, pp. 113501, Sep. 2011.
- K. Ganapathi and S. Salahuddin, "Heterojunction Vertical Band-to-Band Tunneling Transistors for Steep Subthreshold Swing and High on Current," Electron Device Letters, IEEE, vol. 32, no. 5, pp. 689 -691, May 2011.
- Y. Yoon and S. Salahuddin, "Barrier-free tunneling in a carbon heterojunction transistor (Cover Story)," Applied Physics Letters, vol. 97, no. 3, pp. 033102, July 2010.
- B. Behin-Aein, D. Datta, S. Salahuddin, and S. Datta, "Proposal for an all-spin logic device with built-in memory," Nature Nanotechnology, vol. 5, no. 4, pp. 266--270, Feb. 2010.
- S. Salahuddin and S. Datta, "Use of negative capacitance to provide voltage amplification for low power nanoscale devices (Issue Cover Story)," Nanoletters, vol. 8, no. 2, pp. 405-410, Feb. 2008.
- S. Salahuddin, M. Lundstrom, and S. Datta, "Transport effects on signal propagation in quantum wires," Electron Devices, IEEE Transactions on, vol. 52, no. 8, pp. 1734--1742, 2005.

## Awards, Memberships and Fellowships

- Institute of Electrical & Electronics Engineers (IEEE) Fellow, 2019
- American Physical Society (APS) Fellow, 2019
- IEEE EDS George E. Smith Award, 2019
- NSF Presidential Early Career Award for Scientists & Engineers (PECASE), 2013
- IEEE CASS Very Large Scale Integration Systems Best Paper Award, 2013
- NSF Faculty Early Career Development Award (CAREER), 2012
- IEEE NTC Early Career Award in Nanotechnology, 2012
- Hellman Fellow, 2010
- SRC Inventor Recognition Award, 2007